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Native Detess

Detess reconstructs a contiguous or admitted strided INT8/BF16 tensor from MLA physical storage without changing logical values or bit patterns. It shares one semantic request with A65 Detess, while its EV codec and device workers remain backend-specific.

Contract​

Inputs and outputs have explicit equal shapes and dtypes, rank 1–6. Input layout is MlaTiled with a unique D/H/W/C mapping and C present; unmapped axes are outer dimensions. Output is contiguous or scalar-aligned, conservatively nonoverlapping strided storage. Negative strides, nonunit broadcast, overlapping views, MlaCBlocked, rank-zero scalars and in-place conversion are rejected.

Empty tensors require no storage or device submission. Capacity covers the actual physical span, including any output holes. Only logical output elements are written; output gaps remain unchanged. Input channel and alignment padding are ignored. See tensor storage.

Parameters​

ops::detess::Params has no conversion or quantization parameters. The input layout carries tiling, axis and padding metadata. Detess does not infer padding from capacity or reinterpret an alternative tiled format.

Numerical behavior​

For INT8, each logical channel is copied byte-for-byte. BF16 reconstructs each 16-bit word from the low and high channel-byte planes of its source pixel:

bits = low_byte | (high_byte << 8)

No floating-point arithmetic, rounding or saturation occurs. NaN payloads, signaling bits, signed zeros and subnormal bit patterns are preserved.

Tess and Detess change storage without changing values

C++ call​

Place the includes and namespace aliases at file scope; the remaining statements belong in a simaai::kernels::Status-returning caller function. It checks metadata and encodes a relocatable descriptor, not EV74 computation. Runtime must map actual buffers, bind addresses and retain inputs, outputs and any workspace until confirmed device completion.

#include <array>
#include <simaai/kernels/ev74/detess.h>
#include <simaai/kernels/ops/detess.h>

namespace k = simaai::kernels;
namespace op = k::ops::detess;
namespace ev = k::ev74::detess;
k::MlaTiled tiled;
tiled.axes = {-1, -1, 0, 1}; // Shape [W,C], with an explicit channel axis.
tiled.tile_shape = {1, 1, 2, 3};
const std::array inputs{k::TensorSpec{{2, 3}, k::DType::BFloat16, tiled}};
const std::array outputs{k::TensorSpec{{2, 3}, k::DType::BFloat16}};
const op::Request request{inputs, outputs, op::Params{}};
auto checked = op::check_inference(request);
if (const auto *error = std::get_if<k::Error>(&checked)) return *error;
const auto &plan = std::get<op::Plan>(checked);
auto encoded = ev::encode_relocatable(plan);
if (const auto *error = std::get_if<k::Error>(&encoded)) return *error;
// Encoding leaves device addresses unbound; no device work has run.
return {};

See the host contract tests (EV74/detess/tests/correctness.cpp) and device fixture (EV74/detess/tests/runtime_e2e.cpp) for binding and execution coverage.

Memory and lifecycle​

Runtime owns mapping, coherency, asynchronous submission and recovery. Missing firmware capability is an error, not an implicit A65 fallback. A timeout does not permit reuse of outstanding buffers or workspace. Input DMA must complete before reconstruction; every output DMA must retire before its staging slot is reused.

Implementation notes​

Direction and dtype are selected once per job. Separate INT8 and BF16 worker translation units make scalar width constant in addressing and reconstruction. Dense output uses parallel panels and two output slots. BF16 can issue disjoint low/high byte-plane reads together, then waits for both before reconstruction.

Non-dense output uses one device work-item. Preparation orders nonsingleton axes by physical stride and finds the largest contiguous span; execution visits these spans while skipping holes. This supports pitched and permuted views without claiming parallel write ownership for them. Each preceding output transfer retires before the next span is prepared. Oversized pitches use bounded groups of representable row reads rather than narrowing DMA fields.

See Tess for the inverse packing path and shared tile traversal. The inverse is useful as supplemental coverage, not as the sole oracle.

Tests and qualification​

Production correctness tests use independent one-way layout goldens, not just round trips. They cover admitted dtypes/layouts, tails and padding, strided spans, invalid metadata and descriptor fields, capacity and ownership failures. The operation's installed-package E2E fixture tests real device outputs and latency; host codec/source-model checks are not EV execution qualification.